Is it Packaging, or is it Fab?

There's an interesting story up on EDN, titled "Wafer-level packaging pushes past new mobile demands."  The gist of the discussion seems to be exploring where packaging ends and 3-D IC fabrication begins.

IEEE CPMT-SCV Meeting Report - 3D IC Integration: The Next Generation of Electronics (Updated)

The IEEE Components, Packaging and Manufacturing Technology Society, Santa Clara Valley Chapter put together a great program last night:  "3D IC Integration: The Next Generation of Electronics."  The speaker, Dr. W. R. Bottoms, did a wonderful job of illuminating the current state of the industry.  He clearly shares the excitement that we've been blogging about.  I even managed to pick up some interesting tidbits by paying attention to the conversations at the meeting.

Exciting 3D IC Integration Event Coming Up!

The IEEE Components, Packaging and Manufacturing Technology Society, Santa Clara Valley Chapter is putting together what promises to be an extremely interesting program titled, "3D IC Integration: The Next Generation of Electronics."  The fun will commence at 6:00 PM on Wednesday, March 10, 2010, in Santa Clara.

Semi-Therm Course: Cooling Challenges in 3D Packaging

For those, like me, that don't cast our info nets nearly wide enough, this event might have escaped our attention.  That is unfortunate.  The 26th Annual Thermal Measurement, Modeling and Management Symposium is being held next week in Santa Clara.  One course, "Cooling Challenges in 3D Packaging" is of particular interest to those who follow this humble blog.  The short course will be presented by Dereje Agonafer, Ph.D.  Dr. Agonafer is a Professor and Director, Elec, MEMS & Nanoelectronics Systems Packaging Center at the University of Texas at Arlington (Faculty profile).