EDA DesignLine is reporting that IMEC is using Synopsys TCAD process and device simulation tools to:
… model the TSVs in the chip stacks to optimize 3D stacked IC performance and reliability.
The story suggests that:
This collaboration, IMEC and Synopsys said, aims to accelerate the development of TSV technologies and to facilitate the adoption of 3D stacked ICs in the semiconductor industry.
This is all nice, and the TCAD tools clearly provide value for IMEC, but I stand by my previous assertion that the EDA vendors don't have anything approaching a complete flow that fully addresses the range design challenges in 3D.
These IMEC guys are all over this technology, though. They even attended the IEEE CPMT-SCV: 3D IC Integration meeting last night and announced that they are hiring for positions in Leuven, Belgium. They sold it hard, going so far as to point out that Leuven is the home of Stella Artois.
No comments:
Post a Comment