I'm really mad at myself for not heading up to the ISSCC this year. The conference featured a full day forum on 3D Integration. Although I'm sorry that I missed it, I'm thrilled by the attention, as it clearly demonstrates just how important this technology is becoming. I was particularly gratified to see a good mix of industry and academic interests involved in the 3D forum.
There is one presentation that I'm especially disappointed about missing, "3D TSVs - Ready for Design!" from IMEC, appears to reinforce my assertion that 3D is real world technology that is well beyond the "science experiment" stage. We can design these systems, and we can build them!
I excerpted the agenda from the program and shared the result below. I also borrowed a page (PDF) from the full advance program (PDF) - the nicer formatting is a tad easier to read, if you don't mind the pdf.
There is one presentation that I'm especially disappointed about missing, "3D TSVs - Ready for Design!" from IMEC, appears to reinforce my assertion that 3D is real world technology that is well beyond the "science experiment" stage. We can design these systems, and we can build them!
I excerpted the agenda from the program and shared the result below. I also borrowed a page (PDF) from the full advance program (PDF) - the nicer formatting is a tad easier to read, if you don't mind the pdf.
F1: Silicon 3D-Integration Technology and Systems
Organizer: Pascal Urard, STMicroelectronics, Crolles, France
Co-organizer: Ken Takeuchi, University of Tokyo, Tokyo, Japan
Chair: Kerry Bernstein, Applied Research Associates, South Royalton, VT
Committee: Hideto Hidaka, Renesas Techonology, Itami, Japan
Michael Phan, Qualcomm, Raleigh, NC
Joo Sun Choi, Samsung Electronics, Hwasung, Korea
Bob Payne, Texas Instruments, Dallas, TX
Vladimir Stojanovic, MIT, Cambridge, MA
Kees Van Berkel, ST- Ericsson, Eindhoven, The Netherlands
Takayasu Sakurai, University of Tokyo, Tokyo, Japan
This Forum brings together 3D-integration technologies (System-in-Package, Through-Silicon-Via, Contactless-Chip-to-Chip-Communication,...), key components (SDRAM, flash, SoC, sensor,...) and 3D applications (imagers, smart phones, solid-state disk drives,...).
Key issues addressed by the panel experts will include:
- 3D-integration standards
- 3D-integration technologies: SiP, Chip-Scale Packages, Bit-Cost-Scalable 3D cell stacking, TSV, contactless interfaces,...
- Power issues, mechanical issues, temperature distribution
- Product benefits and yields
And, finally, the panel will provide an answer to the question: When will 3D be ready for show time?
Forum Agenda:
Time Topic
8:00 Breakfast
8:20 Introduction
Pascal Urard, STMicroelectronics, Crolles, France
8:30 3D TSVs - Ready for Design!
Pol Marchal, IMEC, Leuven, Belgium
9:15 3D for Wireless Mobile Multimedia Applications - Opportunities and Challenges
Georg Kimmich, ST-Ericsson, Grenoble, France
10:00 Break
10:15 Chip-Scale Camera Module Using Through-Silicon-Via
Jean-Luc Jaffard, STMicroelectronics, Grenoble, France
11:00 2.5D & 3D ICs: Solutions & Challenges
Ho-Ming Tong, ASE Group, Kaoshiung, Taiwan
11:45 Contactless Interfaces in 3D-Integration
Hiroki Ishikuro, Keio University, Yokohama, Japan
12:30 Lunch
1:30 Advancements in SiP Integration and Interconnect Technology
Flynn Carson, STATS ChipPACK, Singapore
2:15 TSV Technology and its Application to DRAM
Uksung Kang, Samsung, Korea
3.00 Break
3:15 3D Flash Memory Technology and Circuit Design
Yoshihisa Iwata, Toshiba, Yokohama, Japan
4:00 3D Integration Challenges in Computing
Samuel Naffziger, AMD, Fort Collins, CO
4:10 Panel Discussion
5:10 Conclusion
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